Author
Number of items: 13.
2018
  • Leakage Current Analysis for Diagnosis of Bridge Defects in Power-Gating Designs. (2018) Vasileios Tenentes, Daniele Rossi, Saqib Khursheed, Bashir M. Al-Hashimi and Krishnendu Chakrabarty
    • 2017
  • Exploiting Aging Benefits for the Design of Reliable Drowsy Cache Memories. (2017) Daniele Rossi, Vasileios Tenentes, Sudhakar M. Reddy, Bashir M. Al-Hashimi and Andrew Brown
  • Susceptible Workload Evaluation and Protection using Selective Fault Tolerance. (2017) Mauricio D. Gutierrez, Vasileios Tenentes, Daniele Rossi and Tom J. Kazmierski
  • Coarse-grained Online Monitoring of BTI Aging by Reusing Power Gating Infrastructure. (2017) Vasileios Tenentes, Daniele Rossi, Sheng Yang, Saqib Khursheed, Bashir M. Al-Hashimi and Steve R. Gunn
  • Scalable Approach for Power Droop Reduction During Scan-Based Logic BIST. (2017) Martin Omana, Daniele Rossi, Filippo Fuzzi, Cecilia Metra, Chandra Tirumurti and Rajesh Galivanche
    • 2016
  • The impact of BTI aging on the reliability of level shifters in nano-scale CMOS technology. (2016) Basel Halak, Vasileios Tenentes and Daniele Rossi
  • Low-Cost and High-Reduction Approaches for Power Droop during Launch-On-Shift Scan-Based Logic BIST. (2016) Martin Omana, Daniele Rossi, Edda Beniamino, Cecilia Metra, Chandra Tirumurti and Rajesh Galivanche
  • Aging Benefits in Nanometer CMOS Designs. (2016) Daniele Rossi, Vasileios Tenentes, Sheng Yang, Saqib Khursheed and Bashir M. Al-Hashimi
  • Impact of Aging Phenomena on Latches’ Robustness. (2016) Martin Omana, Daniele Rossi, TusharaSandeep Edara and Cecilia Metra
  • Reliable Power Gating With NBTI Aging Benefits. (2016) Daniele Rossi, Vasileios Tenentes, Sheng Yang, Saqib Khursheed and Bashir M. Al-Hashimi
    • 2015
  • Modeling and Detection of Hotspot in Shaded Photovoltaic Cells. (2015) Daniele Rossi, Martin Omana, Daniele Giaffreda and Cecilia Metra
  • Impact of Bias Temperature Instability on Soft Error Susceptibility. (2015) Daniele Rossi, Martin Omana, Cecilia Metra and Alessandro Paccagnella
  • Low-Cost On-Chip Clock Jitter Measurement Scheme. (2015) Martin Omana, Daniele Rossi, Daniele Giaffreda, Cecilia Metra, TM Mak, Asifur Raman and Simon Tam